• Найти работу
• Резюме
• Резюме поиска работы программистов

SIARHEI CHURAYEU

32-47, Igumenski street,
Minsk city, Republic of Belarus.

Phone: +(37517)2874714 (home)
Phone: +(095)5300102 (work)
Phone: +7-916-4048237 (mobile)

E-mail: chsol@yandex.ru (home)
E-mail: vhdl2005@yandex.ru (work)
E-mail: serg_vhdl@yahoo.com (private)

KEYWORDS:

VHDL, C++, PASCAL, TCL, REXX,
FPGA, CPLD, ASIC,
ACTIVE-HDL,MODELSIM, ORCAD, MENTOR,
LEONARDO, SYNOPSYS,
P-CAD, SPECCTRA.

OBJECTIVE:

To find a position as a
hardware design engineer,
digital design engineer,
programmer.

EXPERIENCE SUMMARY:

- 5 years of hardware design with using P-CAD, ORCAD.
- 3 years of FPGA/CPLD/ASIC design, with using VHDL, TCL.
- 2 years work with MENTOR GRAPHICS tools.
- Good knowledge features architecture of modern FPGA/CPLD.
- Experience of adjustment devices.
- Experience in the manufacturing processes.
- Experience in the post development support.
- Experience of work in large group.
- Experience of work in large project.

TECHNICAL SUMMARY:

HARDWARE (knowledge and experience of design):

- Microprocessor systems (Intel IXP 425, ADSP-2191M, Gygnal, 8051... etc.)
- SDRAM/DDR memory.
- PCI bus, H100/H110 CT Bus.
- Ethernet/LAN controllers (LAN91C111, Intel LXT972).
- E1 single-chip transceivers (DS21354).
- Xilinx devices (FPGA and CPLD).
- Power DC-DC transformer (Traco Power).
- Sound codec-filter chip (MC14LC5480, Si3210).
- PCB route.

OPERATING SYSTEM:

Windows 95/98, Windows 2000, Unix.

SOFTWARE:

- MODELSIM,
- ACTIVE-HDL,
- LEONARDO,
- SYNOPSYS,
- MENTOR GRAPHICS,
- KEIL,
- P-CAD,
- SPECCTRA,
- ORCAD.

LANGUAGES:

VHDL, C++, PASCAL, ASSEMBLER, TCL, REXX.

EMPLOYMENT HISTORY:

November 2003 to present: "Kedah electronics engineering",
Moscow, Russia.
Position: Senior Hardware Engineer.
Projects and tools:
1. Design CDMA multiuse access system "AsterPlex"
(civilian variant - central station, P-CAD, ORCAD).
2. Design CDMA multiuse access system "AsterPlex"
(military variant - central station, P-CAD, ORCAD) .
3. Design CDMA multiuse access system "AsterPlex"
(military variant - abonent station, P-CAD, ORCAD) .
4. Design CDMA multiuse access system "AsterPlex"
(evolution board, P-CAD, SPECCTRA).
5. Design digital filter (CPLD, VHDL, Active-HDL, Leonardo).
6. Design coder/decoder system (CPLD, VHDL, Modelsim, Synopsys).

January 2002 - November 2003:
1. "Byelmicrosystems" of "Integral" corp., Minsk, Republic of Belarus.
2. Designer center at the Academy of science in the Republic of Belarus,
"Period" ltd.
Position: Hardware Engineer.
Projects and tools:
1. Design of the 10-bit ADC, built-in in micro controller
(analog part, Mentor Graphics, Accusim).
2. Design of the 10-bit ADC, built-in in micro controller
(digital part, VHDL, Modelsim, Leonardo).
3. Design CORE for 8051 microcontroller (FPGA, VHDL).
4. Design CORE of code correction (FPGA, VHDL).
5. Design sound unit for radio-relay station (P-CAD, ORCAD, KEIL).
6. Design control unit for radio-relay station (P-CAD, ORCAD, KEIL).

July 1998 - December 2001: Service in Army.
Adjustment and repair military devices.


EDUCATION:

1993 - 1998: Military Academy of Belarus.
Master degree in electronics discipline.
2002 - 2003: Courses of improvement of qualification.
"Byelmicrosystems" of "Integral" corp., Minsk,
Republic of Belarus.

PERSONAL DATA:

Date of birth: June 18, 1976
Marital status: Single.

FOREIGN LANGUAGES:

Native Russian
Medium English
(Good technical English)

(Rate from 1 to 10, 10 - a native speaker, 1 - do not know)
ENGLISH
Spoken - 4
Written - 6
Read - 8

ADDITIONAL INFORMATION:

Availability: two weeks notice
Salary expectations in USD: from $890 per month.
Geographical preferences: any.

HOBBIES:

Sports, Computers, Horses, History.

REFERENCES:

www.kedah.ru
www.bms.by